Implement Industry Ideas
  • Phase-locked loop (PLL) clock generator

PM7520

Article: 00024545

Phase-locked loop (PLL) clock generator

The PM7520 SyntheCLK? provides multi-output clock generation and distribution using a cascaded phase-locked loop (PLL) architecture with programmable dividers and clock drivers. The Jitter Attenuator (JAT) PLL filters jitter on the incoming reference clock and synchronizes the external voltage controlled crystal oscillator (VCXO). By cascading the Clock Synthesizer PLL with the JAT PLL, this architecture provides clean output clocks using a low cost, low frequency VCXO which is ideal for wireless base station applications requiring highly integrated, low-power clocking solutions.

Benefits
Generates low-jitter, low-phase-noise clock outputs for driving DSP subsystems
Provides an output frequency that is SPI programmable for up to 30 clock outputs

Specifications

Other items

In this category | In this category, (PMC)

Leave request for price calculation right now, we will send you best prices.